Beijing National Research Center for Information Science and Technology, Department of Computer Science and Technology, Tsinghua University, Beijing 100084, China
Abstract:Memristors are non-volatile memory devices that are also capable of colocation computations. General-purpose computations can use memristors to approximate arbitrary functions with neural networks or can use memristors to model basic gate circuits that then perform arbitrary Boolean logic calculations. However, the use of memristors to approximate arbitrary functions does not have controllable errors and the use of memristors to model basic gate circuits is slower than conventional digital circuits. This paper presents a general-purpose approximate computing paradigm for memristors and a memristor based hardware architecture, general-purpose field programmable synapse array (GP-FPSA), that combines the advantages of these two methods for efficient general-purpose approximate computing with controllable errors. A universal approximating construction method is used to resolve the large, uncontrollable error of directly training a neural network for approximations. Then, the model control flow splits complicated functions to reduce the construction cost. The memristor-based architecture significantly improves the computational power for general-purpose computing.
[1] ANTHES G. Inexact design:Beyond fault-tolerance[J]. Communications of the ACM, 2013, 56(4):18-20. [2] WONG H S P, LEE H Y, YU S M, et al. Metal-oxide RRAM[J]. Proceedings of the IEEE, 2012, 100(6):1951-1970. [3] SHAFIEE A, NAG A, MURALIMANOHAR N, et al. ISAAC:A convolutional neural network accelerator with in-situ analog arithmetic in crossbars[C]//2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA). Seoul, South Korea, 2016:14-26. [4] CHI P, LI S C, XU C, et al. PRIME:A novel processing-in-memory architecture for neural network computation in ReRAM-based main memory[C]//2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA). Seoul, South Korea, 2016:27-39. [5] JI Y, ZHANG Y Y, XIE X F, et al. FPSA:A full system stack solution for reconfigurable ReRAM-based NN accelerator architecture[C]//Proceedings of the 24th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS). New York, USA:ACM, 2019:733-747. [6] ZHA Y, LI J. Liquid silicon-Monona:A reconfigurable memory-oriented computing fabric with scalable multi-context support[C]//Proceedings of the 23rd International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS). New York, USA:ACM, 2018:214-228. [7] ESMAEILZADEH H, SAMPSON A, CEZE L, et al. Neural acceleration for general-purpose approximate programs[C]//2012 45th Annual IEEE/ACM Annual International Symposium on Microarchitecture. Vancouver, Canada, 2012:449-460. [8] PENG Z H, CHEN X Y, XU C W, et al. AXNet:Approximate computing using an end-to-end trainable neural network[C]//International Conference on Computer-Aided Design (ICCAD). San Diego, USA, 2020:1-8. [9] LI B X, GU P, SHAN Y, et al. RRAM-based analog approximate computing[J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2015, 34(12):1905-1917. [10] GU P, LI B X, TANG T Q, et al. Technological exploration of RRAM crossbar array for matrix-vector multiplication[C]//The 20th Asia and South Pacific Design Automation Conference. Chiba, Japan, 2015:106-111. [11] HORNIK K, STINCHCOMBE M, WHITE H. Multilayer feedforward networks are universal approximators[J]. Neural Networks, 1989, 2(5):359-366. [12] DONG X Y, XU C, XIE Y, et al. NVSim:A circuit-level performance, energy, and area model for emerging nonvolatile memory[J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2012, 31(7):994-1007. [13] CONG J, XIAO B J. mrFPGA:A novel FPGA architecture with memristor-based reconfiguration[C]//2011 IEEE/ACM International Symposium on Nanoscale Architectures. San Diego, USA, 2011:1-8.