Threshold voltage distribution readout circuit design for flash memory

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Abstract

This paper describes a readout circuit for the flash memory threshold voltage distribution. This circuit includes a capacitor feedback trans-impedance amplifier (CTIA) and an 8 b cyclic analog-to-digital converter which converts the threshold voltages into digital outputs. The system also has horizontal and vertical decoders, a high voltage generator, a bias module and a timing control circuit. The chip was fabricated using 0.13 μm NOR flash memory process with 1 024×1 024 cells and a 2.1 mm×2.8 mm die size. Tests show that this readout circuit accurately depicts the threshold voltage distribution. The circuit can also be used to analysis the discreteness of memory cells and system processes and to improve program/erase algorithms.

Keywords flash memory threshold voltage distribution cyclic analog-to-digital converter

Issue Date: 15 April 2014

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	Dong WU
	Hui LIU
	Nan XIE
	Cencen GAO

Cite this article:

Dong WU,Hui LIU,Nan XIE, et al. Threshold voltage distribution readout circuit design for flash memory[J]. Journal of Tsinghua University(Science and Technology), 2014, 54(4): 546-550.

URL:

http://jst.tsinghuajournals.com/EN/ OR http://jst.tsinghuajournals.com/EN/Y2014/V54/I4/546

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