数据采集终端用分布式印制差分低通滤波器
刘金全1, 王骞1, 许剑1, 胡强2, 曾庆2, 巨乾宇3    
1. 国能大渡河大数据服务有限公司, 成都 610041;
2. 清华四川能源互联网研究院, 成都 610000;
3. 电子科技大学, 成都 610000
摘要:为解决高速数据采集终端的抗干扰问题, 该文基于阶梯阻抗谐振器, 提出了一种分布式印制差分低通滤波器, 其中高阻抗传输线利用松耦合的差分线对实现, 低阻抗传输线利用紧耦合的差分线对实现。为减小滤波器尺寸, 高低阻抗传输线均以折叠线形式实现。作为示例, 采用分布式印制方法, 利用FR4三层印制电路板设计了低成本的差分低通滤波器, 截止频率为3.5 GHz, 可有效覆盖高速数据采集终端的工作频率。该差分低通滤波器可应用于高速数据采集终端, 解决高速采集和无线互联之间的互扰问题。
关键词阶梯阻抗谐振器    差分低通滤波器    低成本    
Distributed printed differential low-pass filters for data acquisition terminals
LIU Jinquan1, WANG Qian1, XU Jian1, HU Qiang2, ZENG Qing2, JU Qianyu3    
1. CHN ENERGY Dadu Rriver Big Data Services Co., Ltd., Chengdu 610041, China;
2. Sichuan Energy Internet Research Institute, Tsinghua University, Chengdu 610000, China;
3. University of Electronic Science and Technology of China, Chengdu 610000, China
Abstract: [Objective] In high-speed data acquisition terminals, differential lines are commonly employed to carry high-speed digital signals, enhancing anti-interference performance. However, mutual interference frequently occurs when high-speed acquisition terminals and wireless devices coexist. For instance, 5G base stations and Gbps high-speed signal acquisition terminals in current 5G high-speed acquisition systems interfere with each other. This issue is addressed by installing electromagnetic interference (EMI) filters on a printed circuit board (PCB); however, EMI filters have disadvantages, including fixed frequency points and high cost, which hinder their practicability. In this work, a design method for a low-cost, easy-to-implement distributed printed differential low-pass filter is proposed based on a step impedance filter that can be designed using simple synthesis tools and applied to multilayer PCBs of various radiofrequency systems. [Methods] Based on a typical LC low-pass filter, step impedance resonators were introduced as a solution to high-frequency parasitic parameters and harmonic suppression. The high- and low-impedance transmission lines serve as an inductor and capacitor, respectively, realizing the transformation from a single-end LC filter to a single-end microstrip filter. Due to the common-mode suppression requirements of differential circuits, symmetrical design and equivalent processing were performed for conversion into a microstrip differential low-pass filter, where the high-impedance line is realized by loosely coupled differential lines and the low-impedance line is realized by tightly coupled differential lines. The larger the impedance difference between high and low impedance in the design, the more it contributes to reducing the filter size, and the device size can be further reduced by adhering to this principle. In addition, considering the influence of the transmission line on the ground impedance, an independent non-grounded pair of differential lines was selected for the design. The PCB board used FR4 with a dielectric constant of 4.2 and a multilayer structure with thicknesses of 0.127 mm and 0.508 mm for the two dielectric layers. The final dimensions were 22 mm×16 mm. [Results] Simulation results showed that the distributed differential filter is a 0-3.5 GHz low-pass filter under ideal conditions. The passband and return loss values were less than 0.5 dB and greater than 20 dB, respectively. Two baluns were added to the circuit design used for differential circuit measurement. Test results revealed that the balun possesses considerable interference of approximately 600 MHz, but the curve without the balun's influence is highly consistent with the simulated curve. The passband and return loss values were < 5 dB and < 17 dB, respectively. [Conclusions] The findings of this work indicate that the method of using differential step impedance to realize a distributed printed filter based on a multilayer PCB board is feasible and can be effectively applied in high-speed data acquisition terminals as a solution to the mutual interference between high-speed acquisition and wireless interconnection.
Key words: stepped impedance resonator    differential low-pass filter    low cost    

在高速数据采集终端中,常用差分线承载高速数字信号的传输,以提高抗干扰性能。然而,当高速采集终端与无线设备共存时,采集终端与无线设备之间的电磁干扰(electromagnetic interference,EMI)问题经常发生。以当前5G高速采集系统为例,系统存在5G基站与高速信号(千兆级)采集终端的互扰现象。为解决这一问题,通常采用的方法是在印制板上加装EMI滤波器,但EMI滤波器存在频点固定和成本高等缺点,难以满足实用需求。

因此,小型化、低成本的印制式差分滤波器成为当前研究热点。近年来,国内外学者提出了多种新型差分滤波器。文[1]将阶梯阻抗多模谐振器与并联耦合线结合,构成了一种新型宽带滤波器。文[2]设计了一种可通过移相器实现同相与异相间宽带转换的滤波器,同异相宽带转换优化了滤波器的共模抑制性能。文[3]设计了一种基于氧化铝薄膜材料设计的差分滤波器,但通带内的插入损耗较大,超过了4.0 dB,且对加工工艺有较高要求。文[4]设计了一种平行耦合线结构的双频点差分滤波器,但整体尺寸较大。文[5]基于槽线结构的阶梯阻抗谐振器设计了一款带通滤波器,近通带处有2对传输零点,具有较好的矩形系数,但设计难度较大,性能一致性难以保证。文[6]结合差分微带槽线与微带谐振器的特点,设计了一种多层分布的差分带通滤波器,但共模抑制性能有待提高。文[7]基于2个C形和1个H形缺陷地结构设计了低通滤波器,但通带内的插入损耗较大,通带外的抑制明显不足。

本文基于阶梯阻抗谐振器,提出了一种分布式印制差分低通滤波器,可利用简单综合工具进行设计,且电路结构可用于各类射频系统的多层印制电路板(printed circuit board,PCB),成本低廉,便于工程化应用。

1 滤波器综合过程

本章讨论由单端LC低通滤波器到分布式差分滤波器(差分LC低通滤波器)的综合过程。

图 1为利用经典滤波器综合方法获得的单端LC低通滤波器[8]

图 1 单端LC低通滤波器

在考虑高频寄生参数、谐波抑制等因素的前提下,采用阶梯阻抗谐振器代替原有LC元件,能有效改善滤波器性能。阶梯阻抗谐振频率易通过传输线尺寸进行控制。阶梯阻抗枝节的谐振条件为

$ \frac{Z_2}{Z_1}=\tan \theta_1 \tan \theta_2. $ (1)

其中:Z1Z2分别为2段不同传输线的特性阻抗,θ1θ2分别为2段不同传输线的电长度[9]

传输线阻抗关系为

$ Z_{\text {in }}=Z_0 \frac{Z_{\text {Load }}+\mathrm{j} l Z_0 \tan \beta}{Z_0+\mathrm{j} l Z_{\text {Load }} \tan \beta}. $ (2)

其中:Zin为传输线输入阻抗;Z0为传输线特性阻抗;ZLoad为传输线负载阻抗;l为传输线长度;β=2π/λλ为电信号在传输线上传播的波长;j为虚数符号。

ZLoad $ \ll $ Z0时,式(2)可近似为

$Z_{\text {in }}=Z_{\text {Load }}+\mathrm{j} l \omega L . $ (3)

其中ω为角频率。

ZLoad $ \gg $ Z0时,式(2)可近似为

$ \frac{1}{Z_{\text {in }}}=\frac{1}{Z_{\text {Load }}}+\mathrm{j} l \omega C . $ (4)

由式(3)和(4)可知,可将高阻抗传输线等效为电感元件,低阻抗传输线等效为电容元件,实现单端LC低通滤波器到单端微带滤波器的转换。

差分电路的设计有多种形式,其中较简便的是在单端LC低通滤波器的基础上进行对称设计,由此可以得到图 2的差分LC低通滤波器[10]。其中,uin为差分信号负极输入,uout为差分信号负极输出。考虑到共模抑制性能的要求,需对LC元件进行等值处理,即L1=L4L2=L5L3=L6C1=C5C2=C6C3=C7C4=C8

图 2 差分LC低通滤波器

图 2可知,各个电感可由松耦合的差分线对实现,而并联双线之间的电容可由紧耦合的差分线对实现。

2 滤波器设计

在基于阶梯阻抗谐振器的低通滤波器的设计中,高、低阻抗的阻抗差越大,越有利于缩小滤波器尺寸[6]。本文采用分布式印制设计差分低通滤波器时,不仅参考了上述思路,进一步缩小器件体积,还考虑了传输线对地阻抗的影响,在设计时选用不接地的独立双线差分线对,其PCB层压结构如图 3所示。PCB板材(图 3中白色部分)型号选用介电常数为4.2的FR4,层压结构为3层,2层介质(图 3中蓝色部分)的厚度分别为0.127 mm(图 3中顶层至中间层介质)和0.508 mm(图 3中底层至中间层介质)。

图 3 PCB层压结构

分布式印制差分低通滤波器电路如图 4所示。

图 4 分布式印制差分低通滤波器电路

分布式印制差分低通滤波器局部设计电路及局部设计参数分别见图 5表 1。最终所设计的滤波器的面积大小为22 mm×16 mm。

图 5 局部设计电路

表 1 局部设计参数 
mm
参数 a b c d e
数值 0.3 0.4 0.3 0.6 0.9

3 仿真与测试

采用ADS仿真软件的矩量法对设计的滤波器进行仿真优化。仿真设计电路和测试结果分别如图 67所示。图 7中,S11为输入反射系数,S21为正向传输系数。

图 6 仿真设计电路

图 7 仿真测试结果

仿真测试结果表明:该分布式印制差分低通滤波器的截止频率为3.5 GHz,通带内的插入损耗小于0.5 dB,回波损耗大于20.0 dB。为了验证仿真测试结果,对设计的滤波器进行实物加工,PCB 3D模型及实物分别如图 89所示。

图 8 PCB 3D模型

图 9 实物

为方便使用双端口矢量网络分析仪测试所设计的滤波器的性能,在实际电路中,接头处连接2个来自Mini-circuits的TCM-43X+宽带巴伦(balun)。

测试与仿真结果对比如图 10所示。可以看出,测试曲线与仿真曲线基本吻合,但600.0 MHz频率以下的S11的测试结果与仿真结果重合性较差,经与巴伦频响曲线对比,发现此处反射异常由巴伦引起。

图 10 测试与仿真结果对比

分布式印制差分低通滤波器的通带范围为0~3.5 GHz,覆盖了数据采集终端的工作频率,可有效提升抗干扰性能。

4 结论

本文基于阶梯阻抗谐振器,提出了一种分布式印制差分低通滤波器。通过松耦合等效电感、紧耦合等效电容及微带线折叠,设计的差分低通滤波器能采用多层PCB实现,可用于高速数据采集终端,有效解决了高速采集和无线互联的互扰问题。此外,其他形式的差分滤波器也可采用该分布式印制方法。

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